The present disclosure relates to a semiconductor structure, and particularly to a semiconductor structure including a dielectric liner laterally surrounding a self-aligned contact via structure and a method for manufacturing the same.
As the dimensions of semiconductor devices shrink, reliable formation of contact via structures without electrical short to adjacent conductive structures has become more and more difficult due to limitations in the overlay control in lithographic processes. One of the more challenging processes is the formation of contact via structures to field effect transistors. Particularly, formation of contact via structures on a field effect transistor requires formation of active region contact via structures that include a source contact via structure and a drain contact via structure, and formation of a gate contact via structure. Because the source region and the drain region are laterally spaced from the gate electrode only by a gate spacer, the gate contact via structure is prone to electrical short to the source contact via structure and/or the drain contact via structure. A method of providing electrical isolation between a gate contact via structure and active region contact via structures is desired in order to reliably manufacture a field effect transistor that is free from electrical short between a gate electrode and source and drain regions.